Quick Recap: Where We Left Off in Part 1

If you’re jumping straight into Part 2, here’s what you missed — and what you really should know before going further. In Part 1, we covered the core physics: how semiconductors work, what doping does to silicon, how a p-n junction creates a one-way gate for electricity, and how a Bipolar Junction Transistor (BJT) uses a small base current to control a much larger collector-to-emitter current.

The key takeaway was this: a transistor is a controllable switch. Apply the right signal, and it either amplifies or toggles between fully ON and fully OFF. That behavior — simple as it sounds — is the foundation of all modern computing.

But here’s what Part 1 didn’t tell you: the transistors inside your phone, laptop, and GPU aren’t BJTs. They’re a completely different animal called the MOSFET. And understanding how transistors actually work in modern electronics means understanding MOSFETs.

MOSFETs: The Transistor That Runs Modern Computing

The MOSFET — Metal-Oxide-Semiconductor Field-Effect Transistor — is without question the most manufactured object in human history. More MOSFETs have been produced than any other artifact our civilization has ever created. By a margin that’s difficult to comprehend.

So how is it different from the BJT we discussed in Part 1? Let’s break it down.

Structure: Four Terminals Instead of Three

A MOSFET has four terminals: the Gate (G), the Source (S), the Drain (D), and the Body (B) (the body is usually connected to source internally, so most discussions treat it as a three-terminal device like a BJT).

In an N-channel MOSFET (the most common type), here’s the basic structure:

• Start with a lightly P-doped silicon substrate (the body).
• Implant two heavily N-doped regions into it — these are the Source and Drain.
• Between the Source and Drain, on the surface of the P-type body, grow a very thin layer of silicon dioxide (SiO₂) — this is the gate oxide, an excellent insulator.
• On top of that oxide, deposit the Gate electrode (originally metal, now usually polysilicon or other conductive materials).

How the MOSFET Actually Switches

Here’s the elegant part. The gate is separated from the semiconductor by the insulating oxide layer — so no current can flow into the gate (unlike a BJT where base current is always needed). Instead, the gate controls current through an electric field. That’s the “field effect” in the name.

When you apply a positive voltage to the Gate of an N-channel MOSFET:

1. The positive charge on the gate repels holes in the P-type body below it, and attracts free electrons toward the surface.
2. Once the gate voltage exceeds a critical threshold (called V_T or V_TH, the threshold voltage), enough electrons accumulate at the surface to form a thin conducting channel between Source and Drain.
3. This channel is called an inversion layer — because the surface of the P-type silicon has been locally converted to behave like N-type silicon.
4. Now current can flow freely from Drain to Source (or electrons from Source to Drain). The MOSFET is ON.
5. Remove the gate voltage — the channel disappears, current stops. The MOSFET is OFF.

The gate is essentially a capacitor plate. It stores charge without consuming current. This is the critical advantage over BJTs: MOSFETs consume almost no static power. You only burn energy when the gate capacitance charges and discharges during switching — not while sitting still in either state.

NMOS vs PMOS — and Why CMOS Changed Everything

Just like BJTs come in NPN and PNP flavors, MOSFETs come in N-channel and P-channel versions. An NMOS transistor (N-channel) turns ON when the gate voltage goes HIGH. A PMOS transistor (P-channel) turns ON when the gate voltage goes LOW — it’s complementary behavior.

Now here’s the brilliant insight that transformed semiconductor design. What if you combined NMOS and PMOS transistors in a complementary pair? When one is ON, the other is OFF. They work together like push-pull partners.

This is CMOS — Complementary Metal-Oxide-Semiconductor — and it’s the architecture that makes modern chips possible.

Why CMOS Is So Efficient

In a CMOS circuit, the output is always driven by one transistor to a HIGH state or by another to a LOW state. At any given moment, there’s no direct path from power supply to ground through both transistors simultaneously — except briefly during switching transitions. This means static power consumption is essentially zero. The chip only draws power when it’s actually switching.

This single property — near-zero standby power — is why we can pack billions of CMOS transistors onto a chip without it melting instantly. If early NMOS-only chips had been scaled to today’s transistor counts, they’d have produced enough heat to vaporize themselves within microseconds.

How Logic Gates Are Built from Transistors

Now we get to the part that most people find genuinely mind-blowing: how the abstract world of logic — AND, OR, NOT, the foundations of all computation — emerges from the physics of tiny silicon switches.

A logic gate is a circuit that takes one or more binary inputs (HIGH=1 or LOW=0) and produces a defined output based on a logical rule. Every gate is built from transistors. Here are the three fundamental ones:

The NOT Gate (Inverter) — The Simplest Gate

The NOT gate takes one input and flips it. Input HIGH → Output LOW. Input LOW → Output HIGH. It’s built from exactly two CMOS transistors: one PMOS and one NMOS in series.

• When Input = HIGH: NMOS turns ON, PMOS turns OFF → Output connects to Ground → Output = LOW ✓
• When Input = LOW: PMOS turns ON, NMOS turns OFF → Output connects to VDD → Output = HIGH ✓

Two transistors. One logical operation. Perfect complementary behavior.

The NAND Gate — Building Block of the Universe

Here’s a surprising fact: the NAND gate (NOT-AND) is considered the “universal gate” because you can build any other logic function using only NAND gates. CPUs, memory controllers, encryption hardware — theoretically all of it can be reduced to NANDs.

A CMOS NAND gate uses four transistors: two NMOS in series (pull-down network) and two PMOS in parallel (pull-up network). When both inputs are HIGH, the series NMOS path pulls output LOW — that’s the AND behavior. The NOT comes from the output being inverted.

These gates combine into larger circuits: half adders, full adders (which add binary numbers), multiplexers (which select between data streams), flip-flops (which store a single bit of information), and registers (which store multiple bits). Stack enough of these together with the right architecture, and you have a CPU.

Inside a Modern Chip: A Story in Miniature

Let me tell you a story. It’s 3am somewhere in a clean room in Taiwan. The air is filtered to be cleaner than a hospital operating theater — 1,000 times cleaner, actually. Engineers in full-body suits move around a machine that cost half a billion dollars. The machine is called an EUV lithography system.

It’s about to print transistors.

A wafer of pure silicon — about the size of a dinner plate, polished to be flat within a few atoms — is coated with a light-sensitive material called photoresist. The EUV machine fires extreme ultraviolet light (with a wavelength of just 13.5 nanometers) through a series of mirrors and lenses to project a circuit pattern onto the wafer.

This process repeats dozens of times, layer by layer, building up an architecture of transistors, metal wires, and insulating layers. When finished, the wafer holds hundreds of chips. Each chip is smaller than a postage stamp. Each chip contains tens of billions of transistors, all connected in patterns that took teams of engineers years to design.

Then comes testing. Each chip is probed with microscopic needles to check every circuit path. Failed chips are marked. The wafer is cut apart (diced). Good chips are packaged — seated in a ceramic or plastic carrier with metal contacts — and shipped around the world to go into devices you use every single day.

The entire process — from blank silicon to finished chip — takes about three months. And it scales: TSMC alone produces billions of chips per year.

Every one of those chips is full of transistors that work exactly the way we’ve been describing in these two articles. Physics at human scale, shrunk to the nanoscale, orchestrated at industrial scale.

Moore’s Law: What It Is, Why It’s Slowing, and What Comes Next

In 1965, Intel co-founder Gordon Moore made an observation: the number of transistors on a chip had been doubling approximately every two years, while costs stayed the same or fell. He predicted this trend would continue. And for decades, it did — with remarkable precision.

This became known as Moore’s Law. It’s not actually a law of physics — it’s an economic and engineering observation about the pace of progress. But for 50+ years, it held up well enough to become a self-fulfilling prophecy, shaping R&D budgets and product roadmaps across the entire industry.

Why It’s Slowing Down

At 3–5 nanometer gate lengths, the physical limits of silicon are becoming very real. Several serious problems are emerging:

• Quantum tunneling: Electrons start leaking through barriers they shouldn’t cross, causing errors and leakage current that wastes power.
• Heat density: Packing more transistors means more heat generated per unit area, even if each individual transistor is more efficient.
• Manufacturing cost: Each new node requires increasingly complex and expensive fabrication equipment (like those EUV machines, which cost ~$200M each).
• Diminishing returns: The performance gain from each successive node is smaller than before.

What’s Next: Beyond Classical Scaling

The industry isn’t giving up — it’s pivoting. Several alternative paths are being explored:

• 3D stacking: Instead of packing more transistors in 2D, stack chips vertically with dense interconnects. Intel’s Foveros and AMD’s chiplet packaging are already doing this.
• New materials: 2D materials like molybdenum disulfide (MoS₂) and carbon nanotubes could make transistors at scales impossible with silicon.
• GAA transistors (Gate-All-Around): Instead of a planar gate or FinFET, wrap the gate around all sides of the channel — better control, less leakage. Samsung and TSMC are transitioning to this now.
• Quantum computing: Uses quantum mechanical properties of particles for certain types of computation. Not a replacement for classical chips in general, but potentially transformative for specific problems like cryptography, drug discovery, and materials science.
• Neuromorphic chips: Circuits that mimic the brain’s neural architecture, potentially far more efficient for AI workloads than conventional CPU/GPU architectures.

Real-World Applications: Where Transistors Actually Work for You Every Day

We’ve spent a lot of time in the abstract. Let’s ground it with some real applications — things you interact with that are entirely dependent on how transistors work.

1. Processors (CPUs and GPUs)

Your CPU executes program instructions by running billions of transistor switching operations per second. Each core does arithmetic, logic comparisons, memory reads and writes — all through precisely timed cascades of transistor states. A modern GPU has even more transistors, organized for massively parallel computation — it’s why they’re so good at rendering graphics and training AI models.

2. Flash Memory and SSDs

Flash memory stores data using floating gate MOSFETs — a special transistor that can trap electrons in an isolated gate, holding a charge even when power is off. This is how your SSD and phone storage work. No magnetic spinning disks, no moving parts — just electrons trapped in transistors by the billions.

3. Smartphone Modems and RF Circuits

Sending and receiving cellular signals requires transistors operating at frequencies of several gigahertz. Special high-speed MOSFETs and BJTs designed for radio frequencies (RF transistors) amplify and filter signals to enable 4G and 5G communications.

4. Power Electronics

The charger brick for your laptop uses power MOSFETs and sometimes IGBTs (a hybrid BJT-MOSFET) to convert AC mains power to the DC your device needs, with high efficiency. Electric car motors are controlled by similar transistor-based inverters that can switch hundreds of amperes in microseconds.

5. Sensors and the Internet of Things

Temperature sensors, pressure sensors, accelerometers, and hundreds of other IoT devices use transistor amplifiers to take tiny analog signals from sensing elements and amplify them enough to be processed digitally. Every smart home gadget, fitness tracker, and industrial sensor depends on this.

Beginner’s Guide Part 2: Putting the Whole Picture Together

Let’s step back and look at the full ladder we’ve climbed across both parts of this series. Starting from individual atoms and ending at the chips that power civilization:

1. Silicon atoms arranged in a crystal lattice → a semiconductor
2. Doped silicon (N-type and P-type) → controllable charge carriers
3. p-n junction → a one-way electrical valve (diode)
4. Two p-n junctions in a BJT → a current-controlled switch/amplifier
5. MOSFET → a voltage-controlled switch using a field effect, far more scalable
6. CMOS pair (NMOS + PMOS) → near-zero static power logic circuits
7. Logic gates (NOT, NAND, NOR, AND, OR, XOR) → basic logical operations
8. Adders, multiplexers, flip-flops → arithmetic and memory at the circuit level
9. ALUs, registers, caches → functional computing blocks
10. CPU, GPU, memory chips → the devices you use

That’s ten levels of abstraction from atom to application. And transistors are the irreplaceable glue between levels 4 and 9. Nothing in modern digital technology makes sense without them.

Common Mistakes When Understanding Modern Transistors

• Thinking smaller transistors are always faster. In the sub-5nm regime, quantum effects and interconnect delays become dominant. The chip’s overall speed now depends as much on the architecture, memory hierarchy, and bus widths as on individual transistor switching speed.
• Believing “nanometer node” names are literal gate sizes. The “3nm” or “2nm” labels used by TSMC and Samsung are marketing names for process generations. The actual transistor dimensions are more complex and don’t literally have 3nm or 2nm gates anymore — the nomenclature is largely historical at this point.
• Assuming more transistors always equals better performance. A chip with fewer, better-organized transistors optimized for a specific workload can dramatically outperform a chip with more but less efficiently arranged ones. Apple’s M-series chips are a perfect example — they win on performance-per-watt through smart architecture, not raw transistor count.
• Conflating CMOS with a specific transistor type. CMOS is a design methodology — using complementary N-channel and P-channel MOSFETs together — not a specific transistor. FinFETs, GAA transistors, and future designs can all be implemented in CMOS configurations.
• Thinking quantum computing will replace classical transistors soon. Quantum computers excel at specific algorithm classes but are not general-purpose replacements for classical silicon chips. They require exotic cooling (near absolute zero for most designs) and are prone to errors that classical chips don’t have. The two technologies will likely coexist for very different workloads.

Pro Tips: Taking Your Understanding Further

Frequently Asked Questions — Part 2

Final Thoughts: The Most Important Object in Modern Life

We’ve covered a lot of ground across both parts of this series. From the quantum behavior of electrons in a silicon crystal, to the p-n junction, to BJTs and MOSFETs, to CMOS logic, to the logic gates that perform computation, to Moore’s Law and the future of transistor technology — this has been the full journey of understanding how transistors actually work.

Here’s the thing I want to leave you with. We live in a world shaped by these tiny devices more than any other technology. Not cars, not electricity, not even the internet — because the internet itself runs on routers, servers, and switches filled with transistors. Transistors are the meta-technology. The enabler of enablers.

And now you understand them. Not just vaguely, not just “it’s a switch” — but genuinely. You know why silicon works. You know what doping does. You know how a MOSFET uses a field effect to control current without touching it. You know how a NAND gate is built and why CMOS is so efficient. You understand the physics underlying every tap, swipe, and click you make.

That’s genuinely rare knowledge. Use it well.